Building a Streaming-Ready RaptorQ FEC Core in Chisel: My CSE228 Project
Building a Streaming-Ready RaptorQ FEC Core in Chisel: My CSE228 Project During my CSE 228 (Agile Hardware Design) course this quarter, I worked on chisel-raptorq, a Chisel-based generator that emits a streaming-compatible, parameterized Forward Error Correction (FEC) codec inspired by the RaptorQ standard. The goal was simple but ambitious: build a hardware IP core capable of protecting real-time video streams over lossy IP networks without depending on retransmissions. This post summarizes what I built, what I learned, what works today, and where the project can go next. ...