RISC-V

My Experience Completing the RVFA Exam and the RISC-V Fundamentals (LFD210) Course Over the past few weeks, I took an important step forward in my RISC-V journey: I completed both the RISC-V Fundamentals (LFD210) course from The Linux Foundation and the RVFA (RISC-V Foundation Associate) certification exam. Together, these experiences significantly deepened my understanding of the RISC-V architecture, its ecosystem, and its long-term potential. This blog is a reflection of that learning—how I prepared, what I learned, how challenging the exam was, and why the combination of the course and certification has made me more confident in RISC-V both academically and professionally. ...

My Journey as a CSE 12 Teaching Assistant at UCSC Teaching RISC-V Assembly to the Next Generation of Computer Scientists This academic year I had the privilege of serving as a Teaching Assistant for CSE 12: Computer Systems and Assembly Language at the University of California, Santa Cruz. The experience has been one of the highlights of my PhD program. It pushed me to deeply understand RISC-V assembly, strengthened my passion for teaching, and connected me with over a hundred students taking their first steps into low-level programming. ...

Bridging the Gap: My PhD Journey at RISC-V Summit 2025 The RISC-V Summit North America 2025 (October 21-23) in Santa Clara was an absolutely pivotal event for my research. Having completed my first year of PhD focused on the next frontier of RISC-V verification—specifically utilizing Large Language Models (LLMs) to verify complex Out-of-Order (OoO) and superscalar cores; this summit felt less like a conference and more like a direct injection of industry validation and technical insight. ...

RISC-V Summit North America 2024: A PhD Student’s Deep Dive into the Open ISA Revolution I was incredibly fortunate to attend the RISC-V Summit North America 2024 in Santa Clara, California, on a scholarship. As a PhD student actively working with RISC-V processors, the experience was truly immersive and fully packed with invaluable insights, connections, and hands-on learning. This year, attending as a researcher focused on processor design, the conference was the most enriching experience, offering a significant and targeted academic experience. ...

Introducing Students to Open Hardware and RISC-V: My Remote Session at NSS College of Engineering Earlier this month, I had the opportunity to conduct a remote RISC-V 101 session for students at NSS College of Engineering, my alma mater. Nearly 50 students joined live, asked enthusiastic questions, and stayed deeply engaged throughout the entire workshop. This session was special for me because it brought together my ongoing work in RISC-V research and open hardware — and the place where my engineering journey began. I designed the talk as a beginner-friendly introduction to: ...